1. Technical Field
The present invention generally relates to a semiconductor design technology, and more particularly, to a method for reducing is output data noise of a semiconductor apparatus and a semiconductor apparatus implementing the same.
2. Related Art
In general, a semiconductor apparatus includes an output buffer to output data. The output buffer drives high data from a power supply voltage, and drives low data from a ground voltage.
FIG. 1 is a circuit diagram illustrating a data output unit of a conventional semiconductor apparatus including a plurality of output buffers. The data output unit of the semiconductor apparatus includes an output buffer section 10. The output buffer section 10 includes a plurality of output buffers BUF0 to BUFn configured to receive data D<0˜n> and output the received data D<0˜n> to input/output pads DQ<0˜n>. At this time, on-die termination (ODT) circuits may be connected to the respective input/output pads DQ<0˜n>, in order to compensate for impedance matching of the output data Q<0˜n>.
The respective output buffers BUF0 to BUFn of the output buffer section 10 drive high data from a power supply voltage VDDQ, and drive low data from a ground voltage VSSQ. Since the respective output buffers BUF0 to BUFn receive power from the common power sources VDDQ and VSSQ, simultaneous switching noise may occur in a power supply voltage VDDQ or ground voltage VSSQ supplied to the output buffers BUF0 to BUFn when a plurality of data transit at the same time. For example, when a plurality of data transit to a high level to a low level, a large current IL1 may be passed to the ground is voltage source VSSQ, and simultaneous switching noise VL1 may occur in the supplied ground voltage VSSQ due to parasitic inductance L1 of the ground voltage terminal. The principle that the simultaneous switching noise VL1 occurs may be expressed by Equation 1 below.
                              V                      L            1                          =                              L            1                    ⁢                                    ∂                              I                                  L                  1                                                                    ∂              t                                                          [                  Equation          ⁢                                          ⁢          1                ]            
Furthermore, when a plurality of data transit from a low level to a high level, simultaneous switching noise VL2 may occur in the supplied power supply voltage VDDQ due to parasitic inductance L2 of the power supply voltage terminal, based on the above-described principle.
The simultaneous switching noise may cause noise in the output data Q<0˜n>.
FIG. 2 is a graph illustrating data noise which may occur in the semiconductor apparatus of FIG. 1. FIG. 2 illustrates data noise which may occur when the plurality of output buffers drive output data Q<0:l> transiting from a high level to a low level. FIG. 2 also illustrates a power supply voltage VDDQ.
Low-level output data Q<k> is driven to a specific output buffer, and output data Q<0˜l> transiting from a high level (i.e., VOH) to a low level (i.e., VOL) are driven to a plurality of output buffers. Since the plurality of output buffers change data from a high level to a low level, large amounts of currents are passed to the is ground voltage source VSSQ at the same time, and simultaneous switching noise VL1 occurs due to parasitic inductance. Due to the influence of the simultaneous switching noise VL1 occurring in the ground voltage VSSQ, data noise occurs in the output data Q<k> maintaining a low level.
Such output data noise does not guarantee the reliability of the entire semiconductor apparatus.